Lunch will be served at 11:45 AM.
From tiny medical devices and agricultural sensors to satellite systems in orbit or beyond, intelligent edge devices have revolutionized the way we observe and interact with the physical world. The demand for autonomous decision making and sophisticated data processing at the edge has motivated a shift of computational power from centralized servers to edge devices themselves, but the limitations of traditional hardware technologies mean progress in the size, performance, and lifespan of these systems is stagnating. This talk describes my work reimagining system and architecture design around new device-level technologies with the potential to transform this exciting computing space. I first present firmware-level techniques exploiting emergent properties of on-chip memory to efficiently preserve state across transient power failures, allowing commodity devices to execute software purely off scavenged environmental energy. I then describe how these techniques can be extended using lightweight hardware designs to eliminate major sources of energy overhead in this class of devices. Finally, I will describe my work building systems to enable deployment of next-generation memories by addressing device-level challenges purely in software. I will conclude with a discussion of my current and future research directions leveraging hardware-level insights to advance architecture and system design, with a particular focus on overcoming the “energy wall” increasingly limiting today’s edge platforms.
Harrison Williams is a postdoctoral scholar in the Computer Science department at Virginia Tech. His research interests are in computer architecture and embedded systems, ranging from software analysis and optimization to novel architectures for emerging technologies. He develops systems that explore the interactions between the software, architecture, and device layers to improve resource-constrained and low-power embedded and mobile systems. His research has been published in various premier architecture and systems venues, including ASPLOS, USENIX ATC, and ISCA. He earned a PhD (2024) in Computer Science and BS degrees (2019) in Electrical and Computer Engineering, all from Virginia Tech. He is the recipient of Virginia Tech’s Davenport Leadership Scholarship, the Best Paper Award in the SenSys 2024 EnsSys workshop, and an honorable mention from the NSF GRFP. More information is available at his website: https://harriswms.github.io/.